1. Field of the Invention
The present invention relates to a physical quantity detecting device for detecting a physical quantity supplied from the outside, to a solid-state imaging device for detecting light supplied from the outside, and to an imaging apparatus employing the solid-state imaging device.
2. Description of the Related Art
For example, a solid-state imaging device for detecting the intensity of incident light coming through a subject as a physical quantity or a particle detecting device for detecting particles and generating electric signals having the level corresponding to the number of particles received for a predetermined period has known as a physical quantity detecting device for detecting a physical quantity supplied from the outside.
For example, a metal oxide semiconductor (MOS) solid-state imaging device, which is a kind of such a physical quantity detecting device, has a pixel array where pixels including photoelectric converters are two-dimensionally arranged in a matrix and a vertical signal line is provided for each pixel column in this pixel matrix. Techniques for allowing extension of the dynamic range in such a MOS solid-state imaging device by changing the storage time (i.e., the exposure time) of each of the pixels in the pixel array to obtain a high-sensitivity signal and a low-sensitivity signal depending on the length of the storage time, and then by combining the high-sensitivity signal and the low-sensitivity signal are widely known.
The following configuration is known as one of such known techniques (see, for example, “Wide Intrascene Dynamic Range CMOS APS Using Dual Sampling” written by Orly Yadid-Pecht and Eric R. Fossum, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 10, pp. 1721-1723, OCTOBER, 1997). Two column circuits for performing predetermined processing on pixel signals output through a signal line are arranged for each pixel column in the pixel array. A high-sensitivity signal and a low-sensitivity signal that are output from one pixel through one signal line are processed in parallel by the two column circuits.
A concept of this known technique will be described using FIGS. 18A and 18B. FIGS. 18A and 18B illustrate a physical arrangement of a pixel array 101 and two column circuit groups 102 and 103, and a concept of scanning of the pixel array 101, respectively. For simplification of the drawings, the pixel array 101 is shown as a pixel array of 18 rows by 22 columns, herein. In the column circuit groups 102 and 103, a column circuit is arranged for each pixel column.
The pixel array 101 is scanned on a row-by-row basis. Additionally, types of scanning include electronic shutter scanning performed for resetting (removing) signal charges stored in photoelectric converters included in pixels and readout scanning performed for reading out signals stored in the photoelectric converters. Furthermore, the readout scanning is performed twice regarding each row with different storage times.
A time from scanning of a pixel row on which the electronic shutter scanning is performed (hereinafter, referred to as a “shutter row”) to scanning of the shatter row as a pixel row on which first readout scanning is performed (hereinafter, referred to as a “read row 1”) corresponds to a storage time 1. Similarly, a time from scanning of the read row 1 to scanning of the read row 1 as a pixel row on which second readout scanning is performed (hereinafter, referred as a “read row 2”) corresponds to a storage time 2. By changing lengths of these storage times 1 and 2, two signals with different sensitivities, namely, a low-sensitivity signal and a high-sensitivity signal, can be obtained.
Referring back to FIGS. 18A and 18B, the storage time 1 is equivalent to a time taken for scanning four rows (4H), whereas the storage time 2 is equivalent to a time taken for scanning eight rows (8H). Thus, a signal, which has sensitivity twice as high as a signal from the corresponding pixel in the read row 1, is obtained from each pixel of the read row 2. The two signals having different sensitivities from the corresponding pixel in the identical row are combined by a signal processing circuit (not shown) provided at a subsequent stage, whereby an image signal with a wide dynamic range can be obtained.
Suppose that a time actually taken for a row scanned as an electronic shutter row or a read row to be switched to another row in the vertical direction of the pixel array 101 is set as a unit of time of scanning (hereinafter, referred to as “1H period”). As shown in FIG. 19A, a shutter operation (an electronic shutter operation) on a shutter row, a readout operation of signals from a read row 1 to the column circuit group 102, a readout operation of signals from a read row 2 to the column circuit group 103, and horizontal transfer of the signals read into each of the column circuit groups 102 and 103 are sequentially performed during 1H period. In the case where the column circuit groups 102 and 103 employ pipeline column circuits, signals are immediately transferred to a subsequent stage after being read into the column circuits, and horizontal transfer of the read signals is performed during the next 1H period. Thus, as shown in FIG. 19B, when pipeline column circuits are employed, a shutter operation on a shutter row, a readout operation from a read row 1, and a readout operation from a read row 2 are sequentially performed during 1H period, in parallel to which horizontal transfer of signals (data) from the previous row is also performed.